Hiring Experienced Verification...

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Posted on the 17/08/16

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We are looking for verification engineers with 2+ yrs of relevant experience.

Job Title : Verification Engineer

Job Description :
1. Expert user of System Verilog with good experience in building verification environment using VIPs.
2. Should have worked on Test Bench components like drivers, monitors and scoreboards in System Verilog.
3. Should be comfortable in writing assertions for protocol validation.
4. Must have good exposure to IP or SoC level verification.
5. Must have experience in UVM or OVM. Added advantage if having knowledge of AXI, AHB, SPI, UART, I2C, etc along with experience in creating Verification plans
6. Designing bus functional models, scoreboards, coverage, assertions, etc.
7. Experience in one of the protocols like ARM, PCIe, Bluetooth/BLE, Wireless/Ethernet/ 802.11, DDR is a must.

Interested candidates, please forward your resume to preeti@aceic.com / niketa@aceic.com

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